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国外优秀信息科学与技术系列教学用书
模拟集成电路的分析与设计（第4版）（影印版）Analysis and Design of Analog Integrated Gircuits,Fourth Edition  |
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【作 者】 Paul R.Gray
【开 本】16 【版 次】0次
【分 类】 计算机书店>>电路设计
【页 数】
875
【字 数】
0
【日 期】
2004年3月
【装 帧】
简装
【出版社】
高等教育出版社
【ISBN】
0
【关注程度】已有3378人关注该图书
【版本状态】『全图版』
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我要购书网的承诺：本网上购书中心所出售的"模拟集成电路的分析与设计（第4版）（影印版）Analysis and Design of Analog Integrated Gircuits,Fourth Edition"图书保证正版，您在本购书中心享有收到图书七天内无条件退货！收到商品15日之内换货的待遇！
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换货规定：从本购书中心所购买"模拟集成电路的分析与设计（第4版）（影印版）Analysis and Design of Analog Integrated Gircuits,Fourth Edition"图书如有质量问题(字迹模糊/缺页/倒装/开线/开胶/折页/封皮破损/缺少随书赠品),可在收到商品15日之内换货
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| 本书的主要内容包括：集成电路有源器件模型，双极型、MOS、BiCMOS集成电路技术单晶体管和多晶体管放大器，电流镜、有源负载及其电压和电流参考值，输出级，单端输出的运算放大器，集成电路的频率响应，反馈，反馈放大器的频率响应与稳定性，非线性模拟电路．集成电路中的噪声，全差分运算放大器。本书可用作高等学校电子信息类本科生的教材或参考书。 |
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CHAPTER1ModelsforIntegrated-CircuitActiveDevices11.1Introduction11.2DepletionRegionofapnJunction11.2.1Depletion-RegionCapacitance51.2.2JunctionBreakdown61.3Large-SignalBehaviorofBipolarTransistors81.3.1Large-SignalModelsintheForward-ActiveRegion91.3.2EffectsofCollectorVoltageonLarge-SignalCharacteristicsintheForward-ActiveRegion141.3.3SaturationandInverseActiveRegions161.3.4TransistorBreakdownVoltages201.3.5DependenceofTransistorCurrentGain/3ronOperatingConditions231.4Small-SignalModelsofBipolarTransistors261.4.1Transconductance271.4.2Base-ChargingCapacitance281.4.3InputResistance291.4.4OutputResistance291.4.5BasicSmall-SignalModeloftheBipolarTransistor301.4.6Collector-BaseResistance301.4.7ParasiticElementsintheSmall-SignalModel311.4.8SpecificationofTransistorFrequencyResponse341.5LargeSignalBehaviorofMetal-Oxide-SemiconductorField-EffectTransistors381.5.1TransferCharacteristicsofMOSDevices381.5.2ComparisonofOperatingRegionsofBipolarandMOSTransistors451.5.3DecompositionofGate-SourceVoltage471.5.4ThresholdTemperatureDependence471.5.5MOSDeviceVoltageLimitations481.6Small-SignalModelsoftheMOSTransistors491.6.1Transconductance501.6.2IntrinsicGate-SourceandGate-DrainCapacitance511.6.3InputResistance521.6.4OutputResistance521.6.5BasicSmall-SignalModeloftheMOSTransistor521.6.6BodyTransconductance531.6.7ParasiticElementsintheSmall-SignalModel541.6.8MOSTransistorFrequency551.7Short-ChannelEffectsinMOSTransistors581.7.1VelocitySaturationfromtheField591.7.2TransonductanceandTransition631.7.3MobilityDegradationfromtheVerticalField651.8WeakInversioninMOSTransistors651.8.1DrainCurrentinWeakInversion661.8.2TransconductanceandTransitionFrequencyinWeakInversion681.9SubstrateCurrentFlowinMOSTransistors71A.1.1SummaryofActive-DeviceParameters73CHAPTER2Bipolar,MOS,andBiCMOSIntegrated-CircuitTechnology782.1Introduction782.2BasicProcessesinIntegrated-CircuitFabrication792.2.1ElectricalResistivityofSilicon792.2.2Solid-StateDiffusion802.2.3ElectricalPropertiesofDiffusedLayers822.2.4Photolithography842.2.5EpitaxialGrowth852.2.6IonImplantation872.2.7LocalOxidation872.2.8PolysiliconDeposition872.3High-VoltageBipolarIntegrated-CircuitFabrication882.4AdvancedBipolarIntegrated-CircuitFabrication922.5ActiveDevicesinBipolarAnalogIntegratedCircuits952.5.1Integrated-CircuitnpnTransistor962.5.2Integrated-CircuitpnpTransistors1072.6PassiveComponentsinBipolarIntegratedCircuits1152.6.1DiffusedResistors1152.6.2EpitaxialandEpitaxialPinchResistors1192.6.3Integrated-CircuitCapacitors1202.6.4ZenerDiodes1212.6.5JunctionDiodes1222.7ModificationstotheBasicBipolarProcess1232.7.1DielectricIsolation1232.7.2CompatibleProcessingforHigh-PerformanceActiveDevices1242.7.3High-PerformancePassiveComponents1272.8MOSIntegrated-CircuitFabrication1272.9ActiveDevicesinMOSIntegratedCircuits1312.9.1n-ChannelTransistors1312.9.2p-ChannelTransistors1412.9.3DepletionDevices1422.9.4BipolarTransistors1422.10PassiveComponentsinMOSTechnology1442.10.1Resistors1442.10.2CapacitorsinMOSTechnology1452.10.3LatchupinCMOSTechnology1482.11BiCMOSTechnology1502.12HeterojunctionBipolarTransistors1522.13InterconnectDelay1532.14EconomicsofIntegrated-CircuitFabrication1542.14.1YieldConsiderationsinIntegrated-CircuitFabrication1542.14.2CostConsiderationsinIntegrated-CircuitFabrication1572.15PackagingConsiderationsforIntegratedCircuits1592.15.1MaximumPowerDissipation1592.15.2ReliabilityConsiderationsinIntegrated-CircuitPackaging162A.2.1SPICEModel-ParameterFiles163CHAPTER3Single-TransistorandMultiple-TransistorAmplifiers1703.1DeviceModelSelectionforApproximateAnalysisofAnalogCircuits1713.2Two-PortModelingofAmplifiers1723.3BasicSingle-TransistorAmplifierStages1743.3.1Common-EmitterConfiguration1753.3.2Common-SourceConfiguration1793.3.3Common-BaseConfiguration1833.3.4Common-GateConfiguration1863.3.5Common-BaseandCommon-GateConfigurationswithFinitero1883.3.5.1Common-BaseandCommon-GateInputResistance1883.3.5.2Common-BaseandCommon-GateOutputResistance1903.3.6Common-CollectorConfiguration(EmitterFollower)1913.3.7Common-DrainConfiguration(SourceFollower)1953.3.8Common-EmitterAmplifierwithEmitterDegeneration1973.3.9Common-SourceAmplifierwithSourceDegeneration2003.4Multiple-TransistorAmplifierStages2023.4.1TheCC-CE,CC-CC,andDarlingtonConfigurations2023.4.2TheCascodeConfiguration2063.4.2.1TheBipolarCascode2063.4.2.2TheMOSCascode2083.4.3TheActiveCascode2113.4.4TheSuperSourceFollower2133.5DifferentialPairs2153.5.1ThedcTransferCharacteristicofanEmitter-CoupledPair2153.5.2ThedcTransferCharacteristicwithEmitterDegeneration2173.5.3ThedcTransferCharacteristicofaSource-CoupledPair2183.5.4IntroductiontotheSmall-SignalAnalysisofDifferentialAmplifiers2213.5.5Small-SignalCharacteristicsofBalancedDifferentialAmplifiers2243.5.6DeviceMismatchEffectsinDifferentialAmplifiers2313.5.6.1InputOffsetVoltageandCurrent2313.5.6.2InputOffsetVoltageoftheEmitter-CoupledPair2323.5.6.3OffsetVoltageoftheEmitter-CoupledPair:ApproximateAnalysis2323.5.6.4OffsetVoltageDriftintheEmitter-CoupledPair2343.5.6.5InputOffsetCurrentoftheEmitter-CoupledPair2353.5.6.6InputOffsetVoltageoftheSource-CoupledPair2363.5.6.7OffsetVoltageoftheSource-CoupledPair:ApproximateAnalysis2363.5.6.8OffsetVoltageDriftintheSource-CoupledPair2383.5.6.9Small-SignalCharacteristicsofUnbalancedDifferentialAmplifiers238A.3.1ElementaryStatisticsandtheGaussianDistribution246CHAPTER4CurrentMirrors,ActiveLoads,andReferences2534.1Introduction2534.2CurrentMirrors2534.2.1GeneralProperties2534.2.2SimpleCurrentMirror2554.2.2.1Bipolar2554.2.2.2MOS2574.2.3SimpleCurrentMirrorwithBetaHelper2604.2.3.1Bipolar2604.2.3.2MOS2624.2.4SimpleCurrentMirrorwithDegeneration2624.2.4.1Bipolar2624.2.4.2MOS2634.2.5CascodeCurrentMirror2634.2.5.1Bipolar2634.2.5.2MOS2664.2.6WilsonCurrentMirror2744.2.6.1Bipolar2744.2.6.2MOS2774.3ActiveLoads2784.3.1Motivation2784.3.2Common-Emitter/Common-SourceAmplifierwithComplementaryLoad2794.3.3Common-Emitter/Common-SourceAmplifierwithDepletionLoad2824.3.4Common-Emitter/Common-SourceAmplifierwithDiode-ConnectedLoad2844.3.5DifferentialPairwithCurrent-MirrorLoad2874.3.5.1Large-SignalAnalysis2874.3.5.2Small-SignalAnalysis2884.3.5.3Common-ModeRejectionRatio2934.4VoltageandCurrentReferences2994.4.1Low-CurrentBiasing2994.4.1.1BipolarWidlarCurrentSource2994.4.1.2MOSWidlarCurrentSource3024.4.1.3BipolarPeakingCurrentSource3034.4.1.4MOSPeakingCurrentSource3044.4.2Supply-InsensitiveBiasing3064.4.2.1WidlarCurrentSources3064.4.2.2CurrentSourcesUsingOtherVoltageStandards3074.4.2.3SelfBiasing3094.4.3Temperature-InsensitiveBiasing3174.4.3.1Band-Gap-ReferencedBiasCircuitsinBipolarTechnology3174.4.3.2Band-Gap-ReferencedBiasCircuitsinCMOSTechnology323A.4.1MatchingConsiderationsinCurrentMirrors327A.4.1.1Bipolar327A.4.1.2MOS329A.4.2InputOffsetVoltageofDifferentialPairwithActiveLoad332A.4.2.1Bipolar332A.4.2.2MOS334CHAPTER5OutputStages3445.1Introduction3445.2TheEmitterFollowerAsanOutputStage3445.2.1TransferCharacteristicsoftheEmitter-Follower3445.2.2PowerOutputandEfficiency3475.2.3Emitter-FollowerDriveRequirements3545.2.4Small-SignalPropertiesoftheEmitterFollower3555.3TheSourceFollowerAsanOutputStage3565.3.1TransferCharacteristicsoftheSourceFollower3565.3.2DistortionintheSourceFollower3585.4ClassBPush-PullOutputStage3625.4.1TransferCharacteristicoftheClassBStage3635.4.2PowerOutputandEfficiencyoftheClassBStage3655.4.3PracticalRealizationsofClassBComplementaryOutputStages3695.4.4All-npnClassBOutputStage3765.4.5Quasi-ComplementaryOutputStages3795.4.60verloadProtecfion3805.5CMOSClassABOutputStages3825.5.1Common-DrainConfiguration3835.5.2Common-SourceConfigurationwithErrorAmplifiers3845.5.3AlternativeConfignrations3915.5.3.1CombinedCommon-DrainCommon-SourceConfiguration3915.5.3.2CombinedCommon-DrainCommon-SourceConfigurationwithHighSwing3935.5.3.3ParallelCommon-SourceConfiguration394CHAPTER6OperationalAmplifierswithSingle-EndedOutputs4o46.1ApplicationsofOperationalAmplifiers4056.1.1BasicFeedbackConcepts4056.1.2InvertingAmplifier4066.1.3NoninverfingAmplifier4086.1.4DifferentialAmplifier4086.1.5NonlinearAnalogOperations4096.1.6Integrator,Differentiator4106.1.7IntemalAmplifiers4116.1.7.1Switched-CapacitorAmplifier4116.1.7.2Switched-CapacitorIntegrator4166.2DeviationsfromIdealityinRealOperationalAmplifiers4196.2.1InputBiasCurrent4196.2.2InputOffsetCurrent4206.2.3InputOffsetVoltage4216.2.4Common-ModeInputRange4216.2.5Common-ModeRejectionRatio(CMRR)4216.2.6Power-SupplyRejectionRatio(PSRR)4226.2.7InputResistance4246.2.8OutputResistance4246.2.9FrequencyResponse4246.2.10Operational-AmplifierEquivalentCircuit4246.3BasicTwo-StageMOSOperationalAmplifiers4256.3.1InputResistance,OutputResistance,andOpen-CircuitVoltageGain4266.3.2OutputSwing4286.3.3InputOffsetVoltage4286.3.4Common-ModeRejectionRatio4316.3.5Common-ModeInputRange4326.3.6Power-SupplyRejectionRatio(PSRR)4346.3.7EffectofOverdriveVoltages4396.3.8LayoutConsiderations4396.4Two-StageMOSOperationalAmplifierswithCascodes4426.5MOSTelescopic-CascodeOperationalAmplifiers4A.A,6.6MOSFolded-CascodeOperationalAmplifiers4466.7MOSActive-CascodeOperationalAmplifiers4506.8BipolarOperationalAmplifiers4536.8.1ThedcAnalysisofthe741OperationalAmplifier4566.8.2Small-SignalAnalysisofthe741OperationalAmplifier4616.8.3InputOffsetVoltage,InputOffsetCurrent,andCommon-ModeRejectionRatioofthe7414706.9DesignConsiderationsforBipolarMonolithicOperationalAmplifiers4726.9.1DesignofLow-DriftOperationalAmplifiers4746.9.2DesignofLow-Input-CurrentOperationalAmplifiers476CHAPTER7FrequencyResponseofIntegratedCircuits4887.1Introduction4887.2Single-StageAmplifiers4887.2.1Single-StageVoltageAmplifiersandTheMillerEffect4887.2.1.1TheBipolarDifferentialAmplifier:Differential-ModeGain4937.2.1.2TheMOSDifferentialAmplifier:Differential-ModeGain4967.2.2FrequencyResponseoftheCommon-ModeGainforaDifferentialAmplifier4997.2.3FrequencyResponseofVoltageBuffers5027.2.3.1FrequencyResponseoftheEmitterFollower5037.2.3.2FrequencyResponseoftheSourceFollower5097.2.4FrequencyResponseofCurrentBuffers5117.2.4.1Common-Base-AmplifierFrequencyResponse5147.2.4.2Common-Gate-AmplifierFrequencyResponse5157.3MultistageAmplifierFrequencyResponse5167.3.1Dominant-PoleApproximation5167.3.2Zero-ValueTimeConstantAnalysis5177.3.3CascodeVoltage-AmplifierFrequencyResponse5227.3.4CascodeFrequencyResponse5257.3.5FrequencyResponseofaCurrentMirrorLoadingaDifferentialPair5327.3.6Short-CircuitTimeConstants5337.4AnalysisoftheFrequencyResponseofthe741OpAmp5377.4.1High-FrequencyEquivalentCircuitofthe7415377.4.2Calculationofthe-3-dBFrequencyofthe7415387.4.3NondominantPolesofthe7415407.5RelationBetweenFrequencyResponseandTimeResponse542CHAPTER8Feedback5538.1IdealFeedbackEquation5538.2GainSensitivity5558.3EffectofNegativeFeedbackonDistortion5558.4FeedbackConfigurations5578.4.1Series-ShuntFeedback5578.4.2Shunt-ShuntFeedback5608.4.3Shunt-SeriesFeedback5618.4.4Series-SeriesFeedback5628.5PracticalConfigurationsandtheEffectofLoading5638.5.1Shunt-ShuntFeedback5638.5.2Series-SeriesFeedback5698.5.3Series-ShuntFeedback5798.5.4Shunt-SeriesFeedback5838.5.5Summary5878.6Single-StageFeedback5878.6.1LocalSeriesFeedback5878.6.2LocalShuntFeedback5918.7TheVoltageRegulatorasaFeedbackCircuit5938.8FeedbackCircuitAnalysisUsingReturnRatio5998.8.1Closed-LoopGainUsingReturnRatio6018.8.2Closed-LoopImpedanceFormulaUsingReturnRatio6078.8.3Summary--Return-RatioAnalysis6128.9ModelingInputandOutputPortsinFeedbackCircuits613CHAPTER9FrequencyResponseandStabilityofFeedbackAmplifiers6249.1Introduction6249.2RelationBetweenGainandBandwidthinFeedbackAmplifiers6249.3InstabilityandtheNyquistCriterion6269.4Compensation6339.4.1TheoryofCompensation6339.4.2MethodsofCompensation6379.4.3Two-StageMOSAmplifierCompensation6449.4.4CompensationofSingle-StageCMOSOPAmps6529.4.5NestedMillerCompensation6569.5Root-LocusTechniques6649.5.1RootLocusforaThree-PoleTransferFunction6649.5.2RulesforRoot-LocusConstruction6679.5.3RootLocusforDominant-PoleCompensation6759.5.4RootLocusforFeedback-ZeroCompensation6769.6SlewRate6809.6.1OriginofSlew-RateLimitations6809.6.2MethodsofImprovingSlew-Rate6849.6.3ImprovingSlew-RateinBipolarOpAmps6859.6.4ImprovingSlew-RateinMOSOpAmps6869.6.5EffectofSlew-RateLimitationsonLarge-SignalSinusoidalPerformance690A.9.1AnalysisinTermsofReturn-RatioParameters691A.9.2RootsofaQuadraticEquation692CHAPTER10NonlinearAnalogCircuits70210.1Introduction70210.2PrecisionRectification70210.3AnalogMultipliersEmployingtheBipolarTransistor70810.3.1TheEmitter-CoupledPairasaSimpleMultiplier70810.3.2ThedcAnalysisoftheGilbertMultiplierCell71010.3.3TheGilbertCellasanAnalogMultiplier71210.3.4ACompleteAnalogMultiplier71510.3.5TheGilbertMultiplierCellasaBalancedModulatorandPhaseDectector71610.4Phase-LockedLoops(PLL)72010.4.1Phase-LockedLoopConcepts72010.4.2ThePhase-LockedLoopintheLockedCondition72210.4.3Integrated-CircuitPhase-LockedLoops73110.4.4Analysisofthe560BMonolithicPhase-LockedLoop73510.5NonlinearFunctionSymbols743CHAPTER11NoiseinIntegratedCircuits74811.1Introduction74811.2SourcesofNoise74811.2.1ShotNoise74811.2.2ThermalNoise75211.2.3FlickerNoise(1/fNoise)75311.2.4BurstNoise(PopcornNoise)75411.2.5AvalancheNoise75511.3NoiseModelsofIntegrated-CircuitComponents75611.3.1JunctionDiode75611.3.2BipolarTransistor75711.3.3MOSTransistor75811.3.4Resistors75911.3.5CapacitorsandInductors75911.4CircuitNoiseCalculations76011.4.1BipolarTransistorNoisePerformance76211.4.2EquivalentInputNoiseandtheMinimumDetectableSignal76611.5EquivalentInputNoiseGenerators76811.5.1BipolarTransistorNoiseGenerators76811.5.2MOSTransistorNoiseGenerators77311.6EffectofFeedbackonNoisePerformance77611.6.1EffectofIdealFeedbackonNoisePerformance77611.6.2EffectofPracticalFeedbackonNoisePerformance77611.7NoisePerformanceofOtherTransistorConfigurations78311.7.1Common-BaseStageNoisePerformance78311.7.2Emitter-FollowerNoisePerformance78411.7.3Differential-PairNoisePerformance78511.8NoiseinOperationalAmplifiers78811.9NoiseBandwidth79411.10NoiseFigureandNoiseTemperature79911.10.1NoiseFigure79911.10.2NoiseTemperature802CHAPTER12FullyDifferentialOperationalAmplifiers8O812.1Introduction80812.2PropertiesofFullyDifferentialAmplifiers80812.3Small-SignalModelsforBalancedDifferentialAmplifiers81112.4Common-ModeFeedback81612.4.1Common-ModeFeedbackatLowFrequencies81712.4.2StabilityandCompensationConsiderationsinaCMFBLoop82212.5CMFBCircuits82312.5.1CMFBUsingResistiveDividerandAmplifier82412.5.2CMFBUsingTwoDifferentialPairs82812.5.3CMFBUsingTransistorsintheTriodeRegion83012.5.4Switched-CapacitorCMFB83212.6FullyDifferentialOpAmps83512.6.1AFullyDifferentialTwo-StageOpAmp83512.6.2FullyDifferentialTelescopicCascodeOpAmp84512.6.3FullyDifferentialFolded-CascodeOpAmp84612.6.4ADifferentialOpAmpwithTwoDifferentialInputStages84712.6.5Neutralization84912.7UnbalancedFullyDifferentialCircuits85012.8BandwidthoftheCMFBLoop856Index865 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