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| 现在您可以轻轻松松，兴致盎然地学习和掌握集成电路版图设计了！本书作者Christopher Saint，IBM的顶尖讲师之一，以轻松幽默的文笔为读者提供了一本图文并茂、实用易读的版图设计参考书，自下而上，由浅入深地构造了设计理念，毫无保留地讲述了从最初版图设计到最终仿真的方方面面。内容覆盖了模拟电路、数字电路、标准单元、高频电路、双极型和射频集成电路的版图设计技术，讨论了版图设计中有关我匹配、寄生参数、噪声、布局、验证、封装等问题及数据格式，最后还提供了两个实际的例子，CMOS放大器与双极型混频器的版图设计。 这些精心组织的材料不仅提供了版图设计一步一步的细节指导，有利于读者深刻理解版图设计的全过程，而且也展示了在版图设计中的关键技术，使读者可真接的应用于日常的工作中。无论对于经验丰富的专业人士或是新手，无疑都会开阔您的眼界、拓展您的思路、启发您的创新意识，从而更能激起您对于版图设计工作，一项极有价值工作的热爱。 |
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| IntroductionAcknowledgmentsOpen Letter to Circult DesignersChapter 1 Digital LayoutChapter PreviewOpening Thoughts on Digital LayoutDesign ProcesVerifying the Circuitry LogicCompiling a NetlistDrive StrengthClock Tree SynthesisLayout ProcessFloorplanningBlock PlacementGate GroupingBlock Level ConnectivityUsing FlylinesTiming ChecksPlacementI/O DriversRoutingPower NetsStrappingClock Net WiringOther Critical NetsRemaining NetsFinishing the Wiring by HandPrefabricated Gate Array ChipsVerificationDesign VerificationPhysical VerificationGDSII FileDRC and LVS ChecksLibrary ManagementSummary and FlowchartColsure on Digital LayoutHere's What We've LearnedChapter 2 Standard Cell TechniquesChapter PreviewOpening Thoughts on Standard Cell TechniquesStandardized GridsGrid-Based SystemsDetermining Grid SizeRule-Based RoutersDirectional Layer TechniqueLibrary Rules for Grid-Based SystemsInput and Output AlignmentFixed Height,Variable WidthDetermining Wire GargeCommon N WellHalf-Grid Cell SizingHalf Design RuleRouting ChannelsAntenna RulesStandardized Input and Output CellsUsing Standardization in Analog Mask DesignClosure on Standard Cell TechniquesHere's What We've LearnedChapter 3 Analog LayoutChapter PreviewOpening Thoughts on Analog LayoutDigital Skills vs.Analog SkillsDifference of ScaleDifference of TeamworkDifference of Completion ScheduleDifference of InnovationDifference of ConstraintsDifference of Understanding Circuit TechniquesThree Key QuestionsQUESTION 1:What does this circuit do?QUESTION 2:How much current does it take?Calculating Crrent DensitiesQUESTION 2a:Where are the high and low current paths?Device OrientationQUESTION 3:What matching requirements are there?Additional QuestionsBipolar AnalogExpctations of an Analog Mask DesignerClosure on Analog LayoutHere's What We've LearnedAppendix:Key Questions DiscussionChapter 4 ParasiticsChapter PreviewOpening Thoughts on ParasticsParasitic CapacitanceWire LengthMetal SelectionMetal over MetalParasitic ResistanceCalculating IR DropsWiring OptionsParasitic InductanceDevice ParasiticsCMOS Transistor ExampleBipolar Transistor ExampleFull Custom OptionsClosure on ParasiticsHere's What We've LearnedChapter 5 MatchingChapter PreviewOpening Thoughts on ParasiticsParasitic CapacitanceWire LengthMetal SelectionMetal over MetalParsitic ResistanceCalculating IR DropsWiring OptionsParsitic InductanceDevice ParsiticsCMOS Transistor ExampleBipolar Transistor ExampleFull Custom OptionsClosure on ParasiticsHere's What We've LearnedChapter 5 MatchingChapter PreviewOpening Thoughts on MatchingImportance of LayoutImportance of CommunicationSimple MatchingRoot Device MethodImterdigitaing DevicesDummy DevicesCommon CentroidCross-QuadingSymmetryMatching Signal PathsDevice Size ChoicesClosure on MatchingHere's What We've LearnedRules of MatchingChapter 6 Noise IssuesChapter PreviewOpening Thoughts on Noise IssuesNoisy NeighborsCommonSense Noise SolutionsTurn Down the VolumeRock Band Moves Inside Their HouseGo Inside Your Own HouseClose All WindowsCall the SheriffMove to a New NeighborhoodWire SolutionsCoaxial ShieldingDifferential SignalsDecoupled Power RailsStacked Power RailsHarmonic InterferenceClosure on Noise IssuesHere's What We've LearnedChapter 7 FloorplanningChapter PreviewOpening Thoughts on FloorplanningPrimary Drivers of FloorplanningPin-Driven PlanningEffect of Pin PlacementESD Supply StrategiesBlock-Driven PlanningSignal-Diven PlanningReshaping BlocksSizing EstimatesLeaving Enough RoomEstimating with Existing CircuitryCloseure on FloorplanningHere's What We've LearnedChapter 8 General TechniquesChapter PreviewGeneral Techniques#1 Pick Five or Six Non-minimum Design Rules#2 Get Thee to the Lowest Parasitic Metal#3 Plenty of Wide Wiring and Vias#4 Don't Believe Your Circuit Designer#5 Use a Consistent Orientation#6 Don't Believe Your Circuit Designer#7 Keep Off the Blocks#8 Care for Your Sensitive and Noisy Signals Early#9 If It Looks Nice,It Will Work#10 Learn Your Process#11 Don't Let Noise Find the Substrate#12 Spresd Your Spinach around Your Dinner Plate#13 Copy and Raname Cells before Making Changes#14Remember Your Hierarchy Level#15 Build-in Easy Metal Revisions#16 Draw Big Power Buses#17 Break Up Large CircuitsClosure on General TechniquesAncient Senrets of Mask DesignChapter 9 PackagingChapter PreviewOpening Thoughts on PackagingBonding MethodsUltrasonic Wedge BondingUltrasonic Ball BondingFlip Chip TechnologyMulti-Tier PackagingIssues in PackagingOverall Appearance45-Degree RuleMinimal Silicon OverlapWire LengthPad DistributionSizing EstimatesPad-Limited DesignCore-Limited DesignPadkage Maximum CheckFinal Die Size CalculationsFilling Pad GapsClosure on PackagingHere's What We've LearnedChapter 9 VerificationChapter PreviewOpening Thoughts on VerificationChecking SoftwareDesign Rule Check(DRC)Boolean Command LinesAND FunctionOR FunctionNOT FunctionRule Checking Command LinesLayout Versus Schematic(LVS)NetlistsProblem Solving1.Check Number of Devices2.Check Types of Devices3.Check Number of Nets4.Soluing Complex Net Problems a.Power Supplies5.Don't Trust Your Circuit Designer6.Check for Possible Swapping Over7.Check for a Top Level Short8.Check for Ninja Invisibility9.Know Your Circuits10.Let Others HelpClosure on VerificationHere's What We've LearnedChapter 11 Data FormatsChapter PreviewOpening Thoughts on Data FormatsIndustry Standard Database FormatsHeader InformationCoordinating ResolutionsPattern GenerationKnow Your GridsClosure on Data FormatsHere's What We've LearnedChapter Study #1 CMOS AmplifierThe New Job AssignmentBill Reasons His FloorplanBill Thinks Through His LayoutTed ReturnsBill RethinksThe Chip Is AssembledPackagingAppendixCase Study #2 Bipolar MixerIntroduction to Case Study 2The Assignment"What Does the Circuit Do?""What Are the Circuit Requirements?"Bipolar Trasistor ReviewFirst LayoutInitial OverviewCurrent SourceTransistorsResistorsLower PairEmittersBasesCollectorsUpper QuadEmittersBasesCollectorsLoadsOutputResistorsAnalysis of First LayoutBipolar Transistor Layout-Wrap-Around TechniqueSecond LayoutCurrent SourceEmittersBasesCollectorsResistorsLower PairInterdigitation PlanEmittersCollectorsBasesInputsUpper QuadInterdigitation PlanEmittersCollectorsBasesInputsLoadsInterdigitation PlanResistorsOutputsAnalysis of Second LayoutThird LayoutLower PairCross-Quading PlanEmittersCollectorsBasesInputsFinal AnalysisComparison of Case Study 1 and Case Study 2BeginningsThe Four EngineersOuttakesContact UsSuggested Readings and ResourcesEducational ProgramsGlossaryIndex |
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